In case you ever need them.
| Opcode | Operand 1 | Operand 2 | Mnemonic | Desc |
| 0000000X | - | - | HLT | Halts the processor. |
| 00DDD000 | - | - | INr | DDD = DDD + 1, except for A (as the CPU treats that as a HLT) and memory access. |
| 00DDD001 | - | - | DCr | DDD = DDD - 1, except for A (as the CPU treats that as a HLT) and memory access. |
| 00000010 | - | - | RLC | A = A >> 1, most significant bit overwrites the Carry flag, Carry flag overwrites the least significant bit |
| 00CCC011 | - | - | Rcc (Conditional RET) | Overwrites PC with whatever is at the top of the call stack. Used to return from subroutines. Only executes if the specified condition is true. |
| 00FFF100 | data | - | ADI, ACI, SUI, SBI, NDI, XRI, ORI, CPI data | Performs the specified the ALU operation with an immediate operand. |
| 00NNN101 | - | - | RST | Pushes the PC onto the call stack, then sets the PC value to NNN * 8. Used when handling interrupts. |
| 00DDD110 | data | - | LrI data | Loads register DDD with a immediate value. |
| 00XXX111 | - | - | RET | Overwrites PC with whatever is at the top of the call stack. Used to return from subroutines. |
| 00001010 | - | - | RRC | Similar to RLC, but shifts the other way. The least significant bit overwrites the Carry flag, and the Carry flag overwrites the most significant bit. |
| 00010010 | - | - | RAL | Like RLC, but the most significant bit overwrites the least significant bit, as well as the Carry flag. |
| 00011010 | - | - | RAR | Like RAL, but the other way around. |
| 01CCC000 | addl | addh | Jcc addr (Conditional Jump) | Sets PC's value to the address formed by addl and addh. |
| 0100PPP1 | - | - | INP port | A gets the value from the specified input port. |
| 01PPPPP1 | - | - | OUT port | The specified output port gets A's value. |
| 01CCC010 | addl | addh | Ccc addr | Similar to jump, but pushes the PC's value to the call stack first. |
| 01XXX100 | addl | addh | JMP addr | Jumps unconditionally to the specified address. |
| 01XXX110 | addl | addh | CAL addr | Calls the specified subroutine unconditionally. |
| 10FFFSSS | - | - | ADr, ACr, SUr, SBr, NDr, XRr, ORr, CPr | Performs the specified ALU operation with the register. |
| 11DDDSSS | - | - | Lds | DDD = SSS. |
| 11111111 | - | - | HLT | Same as the first one. |
3-bit values in instructions:
| SSS/DDD | id | CCC | FFF |
| A register | 000 | FC (Carry flag === false) | ADI ADr (A = A + arg) |
| B register | 001 | FZ (Zero flag === false) | ACI ACr (A = A + arg + Carry flag) |
| C register | 010 | FS (Sign flag === false) | SUI SUr (A = A - arg) |
| D register | 011 | FP (Parity flag === false) | SBI SBr (A = A - arg - Carry flag) |
| E register | 100 | TC (Carry flag === true) | NDI NDr (A = A AND arg) |
| H register | 101 | TZ (Zero flag === true) | XRI XRr (A = A XOR arg) |
| L register | 110 | TS (Sign flag === true) | ORI ORr (A = A OR arg) |
| Memory Access | 111 | TP (Parity flag === true) | CPI CPr (A - arg, return flags, but not value) |
The i8008 has 7 general-purpose registers, with A being the accumulator, ALU instructions always use A as an operand and return the result in A. H and L are used in indirect addressing, where H and L are fused into a single 16-bit register (the two most significant bits are left out, as the 8008 had a 14-bit address bus), for memory access. The flags register has this format:
0000CPZS. The Program Counter (PC) is used to access instructions, and there is a 7-level address call stack, with 14-bit address bus per call stack level.